1. Field of the Invention
The present invention relates to a technique for testing an A-D converter or a D-A converter and, more particularly, to a technique for simultaneously testing a plurality of A-D converters or a plurality of D-A converters.
2. Description of the Background Art
Recent advances in the fields of semiconductor technology have made it possible to convert picture signals and aural signals which are continuous analog quantities into discrete digital quantities and process them in the form of digital signals, instead of processing them in the form of analog signals, to achieve a multi-functional, high-accuracy system. This has provided accomplishment of an A-D (analog-to-digital) converter and a D-A (digital-to-analog) converter, which have been used separately from a digital signal processing circuit, on the same semiconductor integrated circuit as the digital signal processing circuit.
FIG. 27 is a block diagram of a signal processing system 101. The signal processing system 101 receives an analog signal AI and outputs an analog signal AO. The signal processing system 101 comprises an A-D converter 102, a digital signal processing circuit 103, and a D-A converter 104 which are connected in series.
The analog signal AI applied to the signal processing system 101 is sampled on a constant cycle and analog-to-digital converted into a digital signal DI by the A-D converter 102. The digital signal processing circuit 103 receives the digital signal DI and performs a predetermined digital signal processing to output a resultant digital signal DO. The D-A converter 104 digital-to-analog converts the digital signal DO into the analog signal AO. The-signal processing system 101 as above constructed is formed on the same semiconductor integrated circuit.
More than one A-D converter and more than one D-A converter are formed on the same semiconductor integrated circuit. FIG. 28 is a block diagram of a semiconductor integrated circuit disclosed in Preceeding of the 1992 IEICE Spring Conference, C-611, Marukawa et al., wherein two A-D converters and two D-A converters are shown as integrated.
The A-D converters and D-A converters contained in the semiconductor integrated circuit are sometimes required to be subjected to performance evaluation thereof or discrimination between the non-defective and defective when mass-produced. In such cases, a testing method of evaluating the A-D converters equipped with test terminals in the same manner as a single A-D converter has been well known in the art. Another known testing method is to multiplex the functions of the test terminals and switch between a test state and an actual operation state to suppress substantial increase in the number of terminals.
A further known testing method is to provide a means for selecting A-D converters in the circuit to test only the selected A-D converters. FIG. 29 is a block diagram showing a method of testing an A-D converter and a D-A converter which is disclosed in Technical Report ICD89-119 (IEICE), Okada et al. In the disclosed method, analog data for use in testing the A-D converter are applied to the A-D converter through an analog switch, and then the A-D converter converts the analog data into a digital signal which is in turn applied to an I/O buffer through a switch and a test bus.
For testing a plurality of A-D converters, a block selecting register selects another A-D converter. This enables the plurality of A-D converters contained in the semiconductor integrated circuit to be evaluated in the same manner as a single A-D converter.
The performance evaluation or discrimination between the defective and non-defective when mass-produced performed in the conventional testing methods on a plurality of A-D converters and a plurality of D-A converters contained in the semiconductor integrated circuit, requires separate test terminals for the A-D converters, resulting in a need for terminals of the semiconductor integrated circuit which are equal in number to the test terminals when the plurality of A-D converters are contained in the semiconductor integrated circuit.
To avoid this problem, the functions of the test terminals have been multiplexed or the A-D converters to be tested have been selected for testing. However, this causes another problem of an extremely large amount of time for testing all of the A-D converters and D-A converters.
In particular, it is practically difficult to use such testing methods to discriminatingly select the non-defective products in mass production because of time restriction. Further, the above-mentioned problem grows more pronounced as the A-D converters and D-A converters contained in the same semiconductor integrated circuit increase in number and the degree of integration thereof increases.